View MSM66101_8231464.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1/28 ? semiconductor MSM66101 ? semiconductor MSM66101 olms-66k series 16-bit microcontroller general description the MSM66101 is a high performance microcontroller that employs oki original nx-8/100 cpu core. this chip includes a 16-bit cpu, rom, ram, i/o ports, multifunction 16-bit timers, 10- bit a/d converter, serial i/o port, and pulse width modulator (pwm). features ? 64k address space for program memory : internal rom : 12k bytes ? 64k address space for data memory : internal ram : 384 bytes ? high-speed execution minimum cycle for instruction : 400ns @ 10mhz ? powerful instruction set : instruction set superior in orthogonal matrix 8/16-bit data transfer instructions 8/16-bit arithmetic instructions multiplication and division operation instructions bit manipulation instructions bit logic instrucitons rom table reference instructions ? abundant addressing modes : register addressing page addressing pointing register indirect addressing stack addressing immediate value addressing ? i/o port input-output port : 5 ports 8 bits (each bit can be assigned to input or output) input port : 1 port 8 bits ? built-in multifunctional 16-bit timer : 2 following 4 modes can be set for each timer :auto-reload timer mode clock output mode capture register mode real time output mode ? serial port : 1 channel (uart mode with baud rate generator) ? 12-bit pulse width modulator : 2 ? watchdog timer ? transition detector : 4 ? 10-bit a/d converter : 8 channels ? interrupts nonmaskable : 1 maskable : internal 10/external 2 ? stand-by function stop mode : software clock stop mode halt mode : software cpu stop mode hold mode : hardware cpu stop mode e2e1026-27-y4 this version: jan. 1998 previous version: nov. 1996
2/28 ? semiconductor MSM66101 ? package options: 64-pin plastic shrink dip (sdip64-p-750-1.78) : (product name: MSM66101- ss) 64-pin plastic qfp (qfp64-p-1414-0.80-bk) : (product name: MSM66101- gs-bk) 68-pin plastic qfj (plcc) (qfj68-p-s950-1.27) : (product name: MSM66101- js) 64-pin ceramic piggyback (adip64-c-750-1.78) : (product name: msm66g101vs) * the piggyback type is used only for engineering samples. indicates the code number.
3/28 ? semiconductor MSM66101 block diagram p4.0/tm0ck p4.1/tm1ck p3.4/tm0io p3.5/tm1io p3.1/rxd p3.0/txd p4.4/trns0 p4.7/trns3 p5.0/ai 0 p5.7/ai 7 p4.2/pwm0 p4.3/pwm1 p3.2/ int0 p3.3/ int1 p2.3/clkout v ref resout nmi agnd timer 0C1 serial port transi- tion d. a/d conv. pwm 0,1 interrupt cont. peripheral cont. wdt ssp lrb psw alu alu cont. acc temporary constants r. memory cont. pc rap instruction dec. ir ram 384 8 bits rom 12k 8 bits b u s p o r t c o n t . ea ready ale psen rd wr ad0/p0.0 ad7/p0.7 a8 /p1.0 a15/p1.7 osc1 port p0 p1 p2 p3 p4 p5 system cont. osc0 res flt hold/p2.4 hlda/p2.5 gnd v dd
4/28 ? semiconductor MSM66101 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 clkout/p2.3 ad0/p0.0 ad1/p0.1 ad2/p0.2 ad3/p0.3 ad4/p0.4 ad5/p0.5 ad6/p0.6 ad7/p0.7 a8/p1.0 a9/p1.1 a10/p1.2 a11/p1.3 a12/p1.4 a13/p1.5 a14/p1.6 a15/p1.7 p2.0 p2.1 p2.2 p3.7 v dd v ref agnd p5.7/ai7 p5.6/ai6 p5.5/ai5 p5.4/ai4 p5.3/ai3 p5.2/ai2 p5.1/ai1 p5.0/ai0 p4.7/trns3 p4.6/trns2 p4.5/trns1 p4.4/trns0 p4.3/pwm1 p4.2/pwm0 p4.1/tm1ck p4.0/tm0ck 45 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 21 22 23 24 25 26 27 28 29 30 31 32 44 43 42 41 40 39 38 37 36 35 34 33 resout p3.6 ale p3.5/tm1io psen p3.4/tm0io rd p3.3/ int1 wr p3.2/ int0 ready p3.1/rxd ea p3.0/txd flt p2.7 res p2.6 osc0 p2.5/hlda osc1 p2.4/hold gnd nmi 64-pin plastic shrink dip pin configuration (top view)
5/28 ? semiconductor MSM66101 pin configuration (top view) (continued) 48 47 46 45 44 43 42 41 40 39 38 1 2 3 4 5 6 7 8 9 10 11 a8/p1.0 a9/p1.1 a10/p1.2 a11/p1.3 a12/p1.4 a13/p1.5 a14/p1.6 a15/p1.7 p2.0 p2.1 p2.2 p5.2/ai2 p5.1/ai1 p5.0/ai0 p4.7/trns3 p4.6/trns2 p4.5/trns1 p4.4/trns0 p4.3/pwm1 p4.2/pwm0 p4.1/tm1ck p4.0/tm0ck 64 63 62 61 60 59 58 57 56 55 54 p0.7/ad7 p0.6/ad6 p0.5/ad5 p0.4/ad4 p0.3/ad3 p0.2/ad2 p0.1/ad1 p0.0/ad0 v dd v ref agnd 17 18 19 20 21 22 23 24 25 26 27 wr ready ea flt res osc0 osc1 gnd nmi hold/p2.4 hlda/p2.5 12 clkout/p2.3 13 resout 14 ale 15 psen 16 rd 28 txc/p2.6 29 rxc/p2.7 30 txd/p3.0 31 rxd/p3.1 32 int0 /p3.2 37 p3.7/tm3io 36 p3.6/tm2io 35 p3.5/tm1io 34 p3.4/tm0io 33 p3.3/ int1 53 p5.7/ai7 52 p5.6/ai6 54 p5.5/ai5 50 p5.4/ai4 49 p5.3/ai3 64-pin plastic qfp
6/28 ? semiconductor MSM66101 pin configuration (top view) (continued) ai3/p5.3 ai4/p5.4 ai5/p5.5 ai6/p5.6 ai7/p5.7 agnd v ref v dd ad0/p0.0 ad1/p0.1 ad2/p0.2 ad3/p0.3 ad4/p0.4 ad5/p0.5 ad6/p0.6 ad7/p0.7 p3.2/ int0 p3.1/rxd p3.0/txd p2.7 p2.6 p2.5/hlda p2.4/hold nmi gnd osc1 osc0 res flt ea ready wr a8/p1.0 a9/p1.1 a10/p1.2 a11/p1.3 a12/p1.4 a13/p1.5 a14/p1.6 a15/p1.7 p2.0 p2.1 p2.2 clkout/p2.3 resout ale psen rd p5.2/ai2 p5.1/ai1 p5.0/ai0 p4.7/trns3 p4.6/trns2 p4.5/trns1 p4.4/trns0 p4.3/pwm1 p4.1/tm1ck p4.0/tm0ck nc p3.7 p3.6 p3.5/tm1io p3.4/tm0io p3.3/ int1 v dd nc p4.2/pwm0 gnd 61 62 63 64 65 66 67 68 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 nc: no-connection pin 68-pin plastic qfj (plcc)
7/28 ? semiconductor MSM66101 pin descriptions type description symbol p0.0Cp0.7/ ad0Cad7 p1.0Cp1.7/ a8Ca15 p2.0Cp2.2 p2.5/hlda p2.6 ad: outputs the lower 8 bits of program counter during external program memory fetch, and receives the addressed instruction under the control of psen . also outputs the address and outputs or inputs data during an external data memory access instruction under the control of ale, rd , and wr . p1: 8-bit input-output port. each bit can be assigned to input or output. a: outputs the upper 8 bits of program counter (pc 8C15 ) during external program memory fetch. also this pin outputs the upper 8 bits of address during external data memory access instructions. p2: 8-bit input-output port. each bit can be assigned to input or output. p3: 8-bit input-output port. each bit can be assigned to be an input or an output. p2.4/hold hold: input pin to request the cpu to enter the hardware power-down state. p3.0/t x d p3.1/r x d p0: 8-bit input-output port. each bit can be assigned to input or output. i/o i/o i/o t x d: serial port transmitter data output pin. i/o hlda: hold acknowledge: the hlda signal appears in response to the hold signal and indicates that the cpu has entered the power-down state. p2.3/clkout clkout: p2.7 p3.2/ int0 r x d: serial port receiver data input pin with high impedance. p3.3/ int1 int : interrupt request input pin. p3.4/tm0io tm0io-tm1io: one of the following signals is output or input. p3.5/tm1io p3.6 p3.7 ? clock at twice the frequency range of the 16-bit timer overflow ? load trigger signal to the capture register input ? setting value output whether the signal is input or output depends on the mode. p4.0/tm0ck p4: 8-bit input-output port. each bit can be assigned to an input or an output. p4.1/tm1ck tm0ck, tm1ck: clock input pins of timer 0, timer 1. p4.2/pwm0 p4.3/pwm1 p4.4 C p4.7/ trans0 C 3 trans: the input pins which sense the rising edge and set the flag. pwm: 12-bit pulse-width modulator output pin. i/o p5.0 C p5.7/ ai0 Cai7 p5: 8-bit input port. ai: analog signal input pin for a/d converter. i output pin for supplying a clock to peripheral circuits. output frequency range is equal to or twice the system clock.
8/28 ? semiconductor MSM66101 resout outputs 'h' level when the cpu is in reset status. reset to 'l' level in some programs. ale address latch enable: psen program store enable: rd output strobe activated during a bus read cycle. used to enable data on to the bus from the external data memory. wr output strobe during a bus write cycle. used as write strobe to external data memory. i ready used when the cpu accesses low speed peripherals. ea normally set to 'h' level. if set to 'l' level, the cpu fetches the code from external program memory. flt if flt is 'h' level, ale, wr , rd , psen are set to 'h' level when reset. if flt is set to 'l', ale, wr , rd , psen are set to floating level when reset. res reset input pin. osc1 nmi nonmaskable interrupt input pin (falling edge) v ref reference voltage input pin for a/d converter. agnd ground for a/d converter. v dd system power supply. gnd ground. type description symbol o o o o o i i i i o i i i i the timing pulse to latch the lower 8 bits of the address output from port 0 when the cpu accesses the external memory. the strobe pulse to fetch to external program memory. osc0 clock oscillation pins i pin descriptions (continued)
9/28 ? semiconductor MSM66101 registers accumulator control register (cr) pointing register (pr) local register psw pc lrb ssp program status word program counter local register base system stack pointer 15 0 acc 15 0 x1 x2 dp usp index register 1 index register 2 data pointer user stack pointer 15 0 r1 r3 r5 r7 r0 r2 r4 r6 er0 er1 er2 er3 7070
10/28 ? semiconductor MSM66101 sfr address (hex) name symbol r/w 8/16-bit operation reset 0000 0001 0002 0003 0004 i 0005 i 0006 0007 0010 i 0011 0012 i 0013 0018 i 0019 i 001a i 001b i 001c i system stack pointer local register base program status word accumulator standby control register watchdog timer peripheral control register stop code acceptor interrupt request register interrupt enable register external iinterrupt control register ssp (assp) lrb (alrb) pswl (apsw) pswh acc sbycon wdt prphf stpacp ie exicon irq r/w w r/w w 8/16 8 8/16 ffh ffh undefined c8h 0ch 00h 00h f8h fdh "0" 08h 0fh 08h 0fh fch 00h/wdt is stopped 0020 0021 0022 0023 0024 0025 0026 i 0028 0029 002a i 002c 002d 002e 002f 0030 0031 port 0 data register timer 0 counter p3io p3sf p4 p4io tm0 r/w 8 undefined port 0 mode register port 2 secondary function control register p3 p2sf p2io p2 p1io p1 p0io p0 p4sf port 5 p5 0032 0033 timer 0 register tmr0 0034 0035 timer 1 counter tm1 0036 0037 timer 1 register tmr1 port 1 data register port 1 mode register port 2 data register port 2 mode register port 3 secondary function control register port 3 data register port 3 mode register port 4 secondary function control register port 4 data register port 4 mode register r r/w 16 00h undefined 00h undefined 00h c7h undefined 00h c0h undefined 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h i indicates that the register has a nonexistent bit.
11/28 ? semiconductor MSM66101 address (hex) name r/w 8/16-bit operation reset 0040 0041 0046 i 0048 0049 004a i trnsit sttm timer 0 control register tcon1 tcon0 sttmr sttmc 0050 i 0051 0054 0055 0056 i 0058 i timer 1 control register transition detector register serial port transmission baud rate generator counter 00h 00h undefined 00h 00h 0fh 82h undefined 12h undefined f0h 80h stcon serial port transmission baud rate generator register serial port transmission baud rate generator control register serial port transmission mode control register serial port transmission data buffer register serial port receiving error register a/d scan mode register a/d conversion result register 0 serial port receiving mode control register serial port receiving data buffer register 0060 i 0061 stbuf srcon srbuf srstat adscan adcr0 r/w w r/w r r/w r 8 8/16 undefined symbol a/d conversion result register 1 0062 i 0063 adcr1 a/d conversion result register 2 0064 i 0065 adcr2 a/d conversion result register 3 0066 i 0067 adcr3 a/d conversion result register 4 0068 i 0069 adcr4 a/d conversion result register 5 006a i 006b adcr5 a/d conversion result register 6 006c i 006d adcr6 a/d conversion result register 7 006e i 006f adcr7 sfr (continued) i indicates that the register has a nonexistent bit.
12/28 ? semiconductor MSM66101 address (hex) name r/w 8/16-bit operation reset 8/16 0070 0071 i pwmc0 00h f0h 0072 0073 i pwm 0 register pwmr0 00h f0h 0074 0075 i pwm 1 counter pwmc1 00h f0h 0076 0077 i pwm 1 register pwmr1 00h f0h 0078 i 007a i pwm 0 control register pwcon0 0ch 0ch 8 pwm 1 countrol register pwcon1 r/w pwm 0 counter symbol sfr (continued) i indicates that the register has a nonexistent bit.
13/28 ? semiconductor MSM66101 addressing modes the MSM66101 provides independent 64k-byte data and 64k-byte program spaces with various types of addressing modes. these modes are shown below, for both ram (for data space) and rom (for program space). 1. ram addressing mode (for data space) 1.1 register direct addressing 1.2 page addressing a) zero page b) direct page 1.3 pointing register (pr) indirect addressing a) data point (dp) indirect b) user stack pointer (usp) indirect ror dp dp example 18h sfr 0000h 0018h l a, example off 10h ram xx00h xx10h st a, example ram [dp] sll dp example ram [usp] C128 to +127 usp srl 10h example
14/28 ? semiconductor MSM66101 c) index register (x1, x2) indirect 1.4 immediate addressing 2. rom addressing mode (for program space) 2.1 direct addressing 2.2 simple indirect addressing mov #27fh ssp, example 200h rom 0200h lc a, example ram [x1] 0C65535 x1 inc 300h example rom [dp] lc dp a, example 2.3 double indirect addressing ram a, [[dp]] lc dp rom example 2.4 indirect addressing with 16-bit offset rom 0C65535 x1 cmpc a, [300h [x1]] example
15/28 ? semiconductor MSM66101 memory maps program memory space data memory space 0000h 01ffh ffffh 0000h 007fh 0080h 00bfh 00c0h 01ffh sfr area special function registers port, a/d c, timer, pwm, etc.... 007fh 0080h 00bfh 00c0h pr area 00ffh zero page area internal ram area pr0 pr1 pr2 pr3 pr4 pr5 pr6 pr7 x1 x2 dp usp 80 low-order high-order 82 84 86 external memory area 0000h 2fffh ffffh 0000h 0027h 0028h 0037h 0038h 2fffh internal rom area vector table area (40 bytes) external memory vcal table area (16 bytes)
16/28 ? semiconductor MSM66101 absolute maximum ratings recommended operating conditions parameter supply voltage memory hold voltage operating frequency ambient temperature fan out symbol v dd condition range 4.5 to 5.5 unit v ddh f osc n mos load p0 2.0 to 5.5 0 to 10 20 2 v mhz ta C40 to +85 c ttl load p1, p2, p3, p4 1 f osc 10mhz f osc = 0hz v dd = 5v 10% parameter supply voltage input voltage output voltage analog input voltage power dissipation storage temperature symbol v dd condition gnd = agnd = 0v rating C0.3 to 7.0 unit v i v o v ai p d t stg 64-pin shrink dip C0.3 to v dd +0.3 C0.3 to v dd +0.3 C0.3 to v ref 930 C55 to +150 v mw c analog ref. voltage v ref C0.3 to v dd +0.3 ta=85c per package 64-pin qfp 565 50 ta = 85c per output (ta = 25c) 68-pin qfj 1120
17/28 ? semiconductor MSM66101 electrical characteristics dc characteristics parameter symbol condition min. max. unit "h" input voltage 1, 3, 6 "h" input voltage 5, 7 v ih 2.4 4.0 4.2 3.6 v dd +0.3 v dd +0.3 v dd +0.3 v dd +0.3 "h" input voltage 8 "h" input voltage 2 typ. "l" input voltage 1, 2, 3, 6 v il C0.3 C0.3 C0.3 0.8 0.8 0.4 v "l" input voltage 5, 7 "l" input voltage 8 v oh 4.2 4.2 i o = C400 m a "h" output voltage 1, 4 "h" output voltage 2 v ol 0.4 0.4 i o = 3.2ma "l" output voltage 1, 4 "l" output voltage 2 i o = C200 m a i o = 1.6ma input leakage current 3, 6, 7 i ih /i il 1/C1 1/C20 10/ C 10 m a v i = v dd /0v input current 5 input current 8 "h" output current 1 "h" output current 2 i oh i ol C2 C1 10 5 ma v o = 2.4v "l" output current 1 "l" output current 2 i lo 2 m a output leakage current 1, 2, 4 v o = v dd / 0v c i c o pf input capacitance output capacitance 5 7 f = 1mhz ta = 25c i dds 10 100 m a current consumption (during stop) * 0.2 1 v dd = 2v i ddh 10 current consumption (during halt) 6 f osc = 10mhz no load i dd 35 ma current consumption 20 (v dd = 5v 10%, ta = C40 to +85c) i ref 2 10 analog reference power supply current 0.3 0.5 a/d in operation a/d stopped ma m a 1 : applied to p0 2 : applied to p1, p2,p3 and p4 3 : applied to p5 4 : applied to ale, psen , rd , wr and resout 5 : applied to res and nmi 6 : applied to ready and ea 7 : applied to flt 8 : applied to osc0 * : v dd or gnd for ports serving as the input pin. no-load for any other.
18/28 ? semiconductor MSM66101 ac characteristics ? external program memory control ? external data memory control parameter symbol condition min. max. unit clock (osc) pulse ale pulse width psen pulse width psen pulse delay time low address setup time low address hold time high address delay time high address hold time instruction setup time instruction hold time t f w t aw t pw t pad t aas t aah t aad t aph t is t ih c l = 50pf 50 3t f w C20 4t f w C20 t f w C20 2t f w C35 t f w C20 t f w C20 t f w C20 100 0 t f w +20 2t f w +20 t f w +40 t f w +40 t f w +40 t f w C20 ns (v dd =5v10%, ta=C40 to +85c) parameter symbol condition min. max. unit clock (osc) pulse ale pulse width rd pulse width wr pulse width rd pulse delay time wr pulse delay time low address setup time low address hold time high address setup time data hold time t f w t aw t rw t ww t rad t wad t aas t aah t aad t dh c l = 50pf 50 3t f w C20 4t f w C20 4t f w C20 t f w C20 t f w C20 2t f w C35 t f w C20 t f w C20 t f w C20 t f w +20 t f w +20 2t f w +20 t f w +40 t f w +40 t f w +40 ns (v dd =5v10%, ta=C40 to +85c) data delay time t dd t f w C20 t f w +40 memory data hold time t mh 0t f w C20 memory data setup time t ms 100 high address hold time t awh t f w C20 t f w +40 high address hold time t arh t f w C20 t f w +40
19/28 ? semiconductor MSM66101 e f g h i j p q r s t u t ? w clk t pad t pw t aas t aah t aad t aph ale ad0C7 ad8C15 t ? w psen p q r s t u t is t ih pc0C7 inst0C7 pc8C15 t aw $ % & ' ( ) / 0 1 2 3 4 t rad t rw t aas t aah t aad t aph ad0e7 ad8e15 rd / 0 1 : ; < 2 3 4 = > ? t ms t mh din 0C7 rap8C15 t wad t ww t aas t aah t aad t awh ad0e7 ad8e15 wr t dh rap0C7 dout0C7 rap8C15 t dd rap0C7
20/28 ? semiconductor MSM66101 ? serial port control master mode parameter symbol condition min. max. unit clock (osc) pulse width serial clock pulse width input data setup time input data hold time t f w t sckw t stmxs t stmxh t srmxs t srmxh 50 8t f w 8t f w +40 6t f w C20 2t f w +10 50 ns c l =50pf output data setup time output data hold time (v dd =5v10%, ta=C40 to +85c) slave mode parameter symbol condition min. max. unit clock (osc) pulse width serial clock pulse width input data setup time input data hold time t f w t sckw t stsxs t stsxh t srsxs t srsxh 50 8t f w 6t f w +40 6t f w C20 100 100 ns c l =50pf output data setup time output data hold time (v dd =5v10%, ta=C40 to +85c)
21/28 ? semiconductor MSM66101 q r s t u v n o p q v e f c d e i j k f g h i k ' ( ) * 2 3 4 5 " # $ % & ' - . / 0 1 2 * 5 $ % " # $ ( ) * % & ' ( * t ? w osc t ? w t sckw t sckw t stmxs t stmxh t srmxh t srmxs t sckw t sckw t stsxh t stsxs t srsxh t srsxs sck sdout (txd) sdin (rxd) sck sdout (txd) sdin (rxd) valid valid valid valid
22/28 ? semiconductor MSM66101 a/d converter characteristics ? operating range ? a/d converter accuracy normal operation mode parameter symbol condition min. unit resolution crosstalk n e a e r e c see the recommended circuit. v r =v dd v ag =gnd=0v analog input source impedance 5k w one channel conversion time t c =64 m s bit absolute error relative error * 0.5 * 0.5 10 +3.0 C3.5 1.5 * 10 1.0 typ. max. e z 0 zero point error 0 +3.0 +2.0 e f C0.5 lsb full scale error C1.0 C3.5 C3.5 differential linearity error e d +3.0 +2.0 +2.0 C3.5 (v dd =5v10%, f osc =10mhz, ta=C40 to +85c) parameter symbol condition min. max. unit power supply voltage analog reference voltage operating temperature v dd v r v ai r r t op f osc 10mhz 4.5 4.5 v ag C40 5.5 v dd v r +85 v k w c v ag = gnd = 0v analog input voltage analog reference power voltage resistance typ. 16 v dd = 5v 10% * v dd =5v, ta=25 c halt/hold operation mode parameter symbol condition min. unit resolution crosstalk n e a e r e c see the recommended circuit. v r =v dd v ag =gnd=0v analog input source impedance 5k w one channel conversion time t c =64 m s bit absolute error relative error * 0.5 * 0.5 10 +2.0 C3.5 1.0 * 10 0.5 typ. max. e z +0.5 zero point error +0.5 +2.0 +1.0 e f C1.0 lsb full scale error C1.5 C3.5 C2.0 differential linearity error e d +2.0 +1.0 +1.0 C2.0 (v dd =5v10%, f osc =10mhz, ta=C40 to +85c) * v dd =5v, ta=25 c
23/28 ? semiconductor MSM66101 ? recommended circuit ? a/d converter conversion characteristics 1 conversion characteristics diagram 1 3ff [hex] 000 e z min e z max v ref [v] e f max e f min actual conversion (center line) actual conversion width analog input conversion code ideal conversion (center line) reference voltage v ref ai0C7 v dd gnd agnd +5v 0v + 47 f 0.1 f + 47 f 0.1 f 0.1 f r i + C analog input ~ r i (analog input source impedance) 5k w
24/28 ? semiconductor MSM66101 absolute error (e a ) the absolute error indicates a difference between actual conversion and ideal conversion, excluding a quantizing error. the absolute error of the a/d converter gets larger as it approaches the zero point or full scale. (see to conversion characteristics diagram 1.) relative error (e r ) the relative error indicates a deviation from a line which connects the center point of the zero point conversion width with that of the full scale conversion width, excluding a quantizing error. the relative error of this a/d converter is almost due to a differential linearity error. zero point error (e z ) and full scale error (e f ) the zero point error and full scale error indicate a difference between actual conversion and ideal conversion at the zero point and full scale, respectively. (see conversion characteristics diagram 1.) ? a/d converter conversion characteristics 2 (temperature characteristics) 3ff [hex] 000 e s eta [v] C40c +25c +85c +4 [lsb] 0 temperature ta +3 +2 +1 C40 +85 during normal operation during halt e s conversion code analog input e s differential linearity error [c] conversion characteristics diagram 2-2 conversion characteristics diagram 2-1 differential linearity error (e d ) the differential linearity error indicates a difference between the actual conversion width (actual step width) and ideal value (1lsb). with this a/d converter, a voltage for actual conversion is shifted and the inclination of a voltage is changed, with changes of temperature (see conversion characteristics diagram 2-1). specifications described in the foregoing tables are established from eta shown in conversion characteristics diagram 2-1. conversion characteristics diagram 2-2 shows temperature characteristics of differential linearity error of e s .
25/28 ? semiconductor MSM66101 (unit : mm) package dimensions notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). sdip64-p-750-1.78 package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin cu alloy solder plating 5 m m or more 8.70 typ.
26/28 ? semiconductor MSM66101 (unit : mm) notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). qfp64-p-1414-0.80-bk package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 0.87 typ. mirror finish
27/28 ? semiconductor MSM66101 (unit : mm) notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). qfj68-p-s950-1.27 package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin cu alloy solder plating 5 m m or more 4.50 typ. mirror finish
28/28 ? semiconductor MSM66101 adip64-c-750-1.78 (unit : mm) notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).

▲Up To Search▲

Price & Availability of MSM66101

	To Download MSM66101 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .